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Is the bus timing which data outputs same as the data output of T1 cycle?

Latest Updated:03/23/2009

Question:

Regarding the operation in the extension of CS assert term,when using CS assert extension function at the operation in the time of writing, the standard cycle of tWSD1 and tWDD will be set from T1at the regular time to Th , but is the bus timing which the data outputs at this time the same timing as the data output of T1 cycle at the regular time?

Answer:

The timing is the same.
Suitable Products
SH7065
SH7058
SH7055
SH7018
SH7011