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Renesas Electronics America - Knowledgebase

How to process watchdog timer interrupts in V850 devices as a reset?

Latest Updated:03/20/2017


I would like to use processing of the watchdog timer interrupts in the V850 devices as a type of reset processing, but interrupts do not operate normally after control branches to reset processing.


This is because other interrupts cannot be acknowledged when processing is busy handling a watchdog timer interrupt.
This situation differs depending on whether the watchdog timer interrupts are being used as NMI or as ordinary (maskable) interrupts.

The corresponding bit in ISPR is set to 0 when the watchdog timer interrupts are used as ordinary interrupts. Perform the following processing in this event:
(1) Set dummy values to EIPC and EIPSW (set the next address where ISPR is checked to EIPC and set 20H to EIPSW).
(2) Check ISPR. When the corresponding bit is set to "1", execute a RETI instruction.
(3) When the corresponding bit in ISPR becomes "0", branch to the reset processing block.

When the watchdog timer interrupts are used as NMI, the PSW.NP bit is set to "0" where no more interrupts can be acknowledged.
If a maskable interrupt is being serviced when an NMI occurs, the bit in ISPR register corresponding to that interrupt is set to "1."
Clear the NP bit first, and then perform the processing steps (1) to (3) shown above.

The following is a specific program sample.

Suitable Products
V850 Family