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What's the concept about external impedance of A-D conversion input?

Latest Updated:10/18/2004

Question:

I wish to know the concept about the external impedance of A-D conversion input.

Answer:

The following shows the relationship between the output impedance of an analog output device and the set value of an external stabilizing capacitor.

  • Regarding the analog input pins
Fig 1 shows the internal equivalent circuit of the analog input unit of the microcomputer. To obtain exact A-D conversion results, it is necessary that the internal capacitor C2 of the A-D conversion circuit be fully charged within a given time (i.e., sampling time). To meet this sampling time requirement, we recommend that a stabilizing capacitor C1 be added external to the chip.
The following describes the output impedance of an analog output device and how to determine the value for the external stabilizing capacitor to meet the requirement. Explanation will also be made for the case where the output impedance of an analog output device is low and the external stabilizing capacitor C1 is unnecessary.


Fig 1. Internal equivalent circuit of the analog input unit

(a) Example for calculating the external stabilizing capacitor C1 (recommended to be added)
We will consider the capacitance of C1 by assuming that R1 in Fig 1 is infinitely large and the charge for the internal capacitor C2 is supplied by C1, and that the potential fluctuations, Vp, caused by capacitance division of C1 and C2 is 0.1 LSB or less. For the 10-bit A-D converter where VREF is 5.12 V, 1 LSB determination voltage = 5.12 V / 1024 = 5 mV. In order to suppress potential fluctuations 0.1 LSB or less, the fluctuation should be kept within 0.5 mV.

 

(b) Maximum value for the output impedance R1 when C1 is not added
If the external capacitor C1 in Fig 1 is unused, it is necessary to examine whether C2 can be fully charged. First, the following shows an equation to find i2 for the case where C1 in Fig 1 is nonexistent.



Fig 2. A-D conversion timing diagram
 


Shown below is an example for calculating the maximum value of R1 in A-D conversion mode where Xin = 10/8 MHz, Cin = 10 pF, C2 = 2.9 pF and R2 = 2K.
Xin BCLK period Conversion mode Speed mode A-D conversion execution cycle T (C2 charging time) in ns Maximum value of R1 (ohms)
10MHz 50ns A-D conversion mode: Single Normal 294 367 28,000
10MHz 50ns A-D conversion mode: Single Double 168 210 15,829
8MHz 62.5ns A-D conversion mode: Single Normal 294 459 35,131
8MHz 62.5ns A-D conversion mode: Single Double 168 262 19,860

Note:The conversion cycle above represents the number of cycles not including dummy cycles at the start and end.


In comparator mode, the equation given below applies, because sampling and comparison each are performed only once.


Shown below is an example for calculating the maximum value of R1 in comparator mode where Xin = 10/8 MHz, Cin = 10 pF, C2 = 2.9 pF and R2 = 2K.
Xin BCLK period Conversion mode Speed mode A-D conversion execution cycle T (C2 charging time) in ns Maximum value of R1 (ohms)
10MHz 50ns Comparator mode: Single Normal 42 525 40,248
10MHz 50ns Comparator mode: Single Double 24 300 22,806
8MHz 62.5ns Comparator mode: Single Normal 42 656 50,403
8MHz 62.5ns Comparator mode: Single Double 24 375 28,620

Note:The conversion cycle above represents the number of cycles not including dummy cycles at the start and end.

Suitable Products
32170, 32174
32171
32172, 32173