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What is Interrupt?

Latest Updated:04/01/2008


What is Interrupt?


(1)Basic operation
Interrupt means that the CPU stops the current program processing and processes another program in response to a request signal from the outside. In other words, it is a technique of performing another processing in asynchronization with program processing.
At this time, the address at which the program processing is stopped and the CPU branches to another program is defined for each interrupt source.

In 78K microcontrollers, the start address of each interrupt servicing routine is called a vector, and the vectors corresponding to various interrupt sources are set to a contiguous address space as a table in ROM. When an interrupt is acknowledged, information corresponding to the source is referenced from this vector table, and a program flow branches to the start address using this information. The start address of each interrupt servicing routine that is designed for specific sources must be written into the interrupt vector table by the user.
In V850 microcontrollers, a (16-byte) area of the branch destination for each interrupt is called an interrupt handler.
When an interrupt is acknowledged, a program flow branches to the handler's start address corresponding to the interrupt source. If the interrupt servicing routine has not fallen within the handler area, and has instead been placed in a different area, a branch instruction to the start address of that area is set to the handler.

When servicing is completed, processing returns to the previous task.
When branching occurs in a 78K microcontroller, the execution information for the interrupted program, i.e., the address (value of the program counter (PC)) and status flag (value of program status word (PSW)), are automatically saved to the stack area in RAM. When the RETI (Return from Interrupt) instruction is executed at the end of the interrupt servicing routine, the saved execution information for the program is restored to the PC and PSW, so that the CPU can return to the original processing.
The contents of the other general-purpose registers are not automatically saved to the stack, etc., when an interrupt occurs. If necessary, perform processing to save them (by the PUSH instruction) or restore them (by the POP instruction). In a 78K microcontroller (except for 78K0S), the general-purpose registers are in a register bank (multiple set), so if selection instruction of the register bank is executed at the start of a interrupt servicing routine, there is no need for executing PUSH or POP instruction.
When an interrupt occurs in a V850 microcontroller, execution information is just automatically saved to the system register. Therefore, to avoid overwriting the system register contents when multiple interrupts are enabled, the information must be saved to a stack area.

Since a reset changes most interrupts into disabling status (DI), an EI (Enable Interrupt) instruction needs to be executed to enable interrupts. During the DI status, the IE flag (PSW) = 0 in 78K devices and the ID flag (PSW) = 1 in V850 devices.

For the interrupt function of specific microcontroller products, also refer to FAQ of the 78K and V850.

If there are two or more interrupt sources, each source usually has a priority and, according to this priority, an interrupt controller determines the source to be serviced. An interrupt request having the lower priority is held pending.
When servicing of the interrupt source with the highest priority has been completed, servicing of the interrupt source with the second highest priority (the highest priority at that point) is started.

(3)Masking interrupt
Interrupts come in two types: maskable and non-maskable. The maskable interrupt can be disabled. To disable a maskable interrupt, the DI (Disable Interrupt) instruction is used. To enable it, the EI (Enable Interrupt) instruction is used. Some microcontrollers mask interrupt requests by register setting, so that they are not generated.
The non-maskable interrupt cannot be disabled and has the highest priority.

(4)Multiple interrupts
If an interrupt request having a priority higher than that of the interrupt currently being serviced occurs, that interrupt must be serviced. In this case, execution branches further, creating a state of multiple interrupts. This is called nesting.
Generally, however, a DI (Disable Interrupt) status is created when an interrupt request has been acknowledged. To enable nesting, therefore, the EI (Enable Interrupt) instruction must be executed. If the timing of enabling nesting passes after the EI instruction has been executed, the DI instruction is executed and nesting is disabled.
When interrupt servicing has completed by the RETI instruction, the EI status is automatically restored, and the next interrupt request can be acknowledged.

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