Skip to main content
Renesas Electronics America - Knowledgebase

Can I use IAR Code Spy with SSP?

Latest Updated:10/04/2016


Can I use IAR Code Spy to look at my code coverage in SSP?


Yes you can use IAR Code Spy with SSP to analyze your code coverage. Here is some information on how to do it:

Code coverage does work, using the IAR C-Spy debug plugin (rather than the Renesas GDB debug plugin) to debug with. My setup is e2studio, SSP 1.0 Gold from the gallery, and IAR EW ARM from the gallery, and the latest IAR Embedded Workbench plugin.


You will need to make sure that you are using the latest version of the JLink DLL (there have been some updates in JLink DLL and the JLink firmware, adding in support for SWO in the JLink OB (the JLink that is populated on the Synergy boards), and also for enabling the trace clock in the Synergy devices, as by default, at power on of the device the Trace clock is disabled (Segger added support in the JLink DLL to enable the trace clock at connection).


SWO is used for the code coverage.


So first, download the latest version of the Segger JLink software and documentation pack from :-


and install it (update the 3rd party applications during the install process, but this will only update IAR EW_ARM, not e2studio). The current version is V5.12e, this will install to C:\Program Files\SEGGER\JLink_V512e. With e2studio closed, copy the file JLinkARM.DLL from C:\Program Files\SEGGER\JLink_V512e to the e2studio directory C:\Renesas\e2_studio\DebugComp\ARM\Segger (re-name or delete the existing version of this DLL in this directory).


Next, open a command Window, and run C:\Program Files\SEGGER\JLink_V512e\jlink.exe, and if you see a dialog box saying there is a firmware update, do the firmware update to update the firmware of the JLink to the latest version of the Jlink firmware.


Next, if you are using the JLink OB (the on board JLink, integrated on the board), then there is a further step, to update the bootloader of the RX that implements to the JLink:-


At the JLink prompt, type connect, then choose the device (default in my case is R7FS7G2), and S (the OB Jlink only supports SWD connection), and the speed (default is ok, so just press "enter"). You should now see :-



Now type "UpdateBTL", you should see "O.K.", if you type UpdateBTL again, you will see "O.K., BTL already up-to-date":-



Now the firmware and the bootloader on the JLink are up to date.


Now we can debug the project, with the update firmware and DLL (probably best to power cycle the board and JLink at this point, to make sure the new firmware is being used).


In the debug setup for the project:-


Select the CPU clock as 120MHz (this is due to the fact the trace clock in a Synergy S7G2 device is set to half the CPU clock, whereas in most Cortex M4 devices (I believe) the trace clock is running 1:1 with the CPU clock, so we have to specify the CPU clock as half its actual value), and the SWO clock as "Auto" :-



Now, in the connection (this is using the C-SPY debug plugin, not the normal GDB debug plugin), select the connection as SWD :-



And then connect to the board. Open the C-SPY Code Coverage Window, and enable code coverage , and refresh the code coverage and you should see the code coverage set to zero:-



Now, after running the code and execution has stopped, you should see the code coverage figures updated:-



I have confirmed the code coverage works with the Jlink OB, and an external JLink.

Suitable Products